1. Field of the Invention
The present invention relates to liquid crystal display (LCD) devices. More particularly, the present invention relates to a method of driving a liquid crystal display device while consuming low amounts of power.
2. Discussion of the Related Art
Liquid crystal display (LCD) devices display moving images using switching elements such as thin film transistors (TFTs). Owing to their compact construction and light weight, LCD devices are commonly used in many types of portable devices.
FIG. 1 illustrates an equivalent circuit diagram of a related art LCD device.
Referring to FIG. 1, a related art liquid crystal display (LCD) device generally includes a timing controller 30, a gray level voltage generator 20, a gate driver 40, a data driver 50, and a liquid crystal panel 60.
The timing controller 30 uses video and synchronizing signals output by a central processing unit (not shown) to generate a plurality of driving signals. The driving signals are then applied to the gate driver 40 and the data driver 50 to display images on the liquid crystal panel 60.
The gray level voltage generator 20 provides i-number of gray level voltages V1 to Vi, corresponding to i-number of gray levels, to the data driver 50. For example, when input color data has an 8-bit format, the gray level voltage generator 20 generates 28 number of gray level voltages V1 to V256, corresponding to 256-gray levels.
The gate driver 40 drives a plurality of gate lines of the liquid crystal panel 60 in accordance with driving signals output by the timing controller 30 while the data driver 50 drives a plurality of data lines of the liquid crystal panel 60 in accordance with driving signal output by the timing controller 30.
The plurality of gate and data lines of the liquid crystal panel 60 cross each other to define a plurality of pixel regions. Thin film transistors (TFTs) T are connected to the gate and data lines at crossings thereof. Specifically, each TFT T includes a gate electrode connected to a gate line and a source electrode connected to a data line. Pixel electrodes (not shown) are connected to drain electrodes of each TFT T. Each TFT T is also connected to a liquid crystal capacitor CLC and a storage capacitor CST. Accordingly, each liquid crystal capacitor CLC is disposed between a corresponding pixel electrode and a common electrode and each storage capacitor CST is connected to a corresponding pixel electrode.
During one frame of the liquid crystal panel 60, the gate driver 40 sequentially selects the gate lines by supplying a gate signal to each selected gate line. When a gate line is selected, the gate signal is supplied to the gate electrode of each TFT T connected to that gate line, the TFT T is turned on, and a channel is established. Additionally, the data driver 50 supplies a data signal, corresponding to imaging information, which becomes charged within the liquid crystal and storage capacitors CLC and CST via the TFT T. Once the TFT T is turned off, the liquid crystal and storage capacitors CLC and CST maintain a voltage associated with the supplied data signal. Accordingly, the storage capacitor CST can maintain a voltage at the pixel electrode until a subsequent frame.
Generally, the related art LCD device 10 displays images by reorienting alignment characteristics of liquid crystal molecules in accordance with data signals applied to the liquid crystal capacitors CLC and in accordance with electric charges stored within the storage capacitors CST. If the data signal applied to the data lines maintains the same polarity through consecutive frames, the liquid crystal molecules may deteriorate and the display quality of the liquid crystal panel 60 may be degraded. Such deterioration and degradation can be solved by incorporating a data inversion driving method wherein the polarity of applied data signals is inverted in consecutive frames.
Data inversion driving method are generally classified as line inversion, column inversion, or dot invention driving methods. According to the line inversion driving method, data signals having positive (+)and negative (−) polarities are alternately supplied to groups of TFTs T connected to adjacent gate lines. Accordingly, a polarity of voltages at pixel electrodes connected to odd-numbered horizontal lines of TFTs T (i.e., TFTs T that are connected to odd-numbered gate lines) is opposite a polarity of voltages at pixel electrodes connected to even-numbered horizontal lines of TFTs T (i.e., TFTs T that are connected to even-numbered gate lines).
According to the column inversion driving method, data signals having positive (+) and negative (−) polarities are alternately supplied to groups of TFTs T connected to adjacent data lines. Accordingly, a polarity of voltages at pixel electrodes connected to odd-numbered vertical lines of TFTs T (i.e., TFTs T that are connected to odd-numbered data lines) is opposite a polarity of voltages at pixel electrodes connected to even-numbered vertical lines of TFTs T (i.e., TFTs T that are connected to even-numbered data lines).
According to the dot inversion driving method, data signals having positive (+) and negative (−) polarities are alternately supplied to groups of TFTs T connected to adjacent gate and data lines. Accordingly, a polarity of voltages at pixel electrodes connected to odd- and even-numbered ones of TFTs T in horizontal and vertical lines of TFTs T is alternated. Of the various types of data inversion driving methods available, the dot inversion driving method ensures superior display of images and effectively minimizes a flicker phenomenon.
FIGS. 2A and 2B schematically illustrate polarities of voltages at pixel electrodes during consecutive frames when an in-plane switching (IPS) mode liquid crystal display (LCD) device is driven according to the related art dot inversion driving method.
Generally, IPS mode LCD devices include an IPS mode LCD panel 160, a gate driver 140, and a data driver 150. Although not shown, IPS mode LCD devices also include common and pixel electrodes arranged on the same substrate of the IPS mode LCD panel 160. Further, common lines (not shown) are formed on the same substrate on which the gate lines are formed to supply a common voltage Vcom to the pixel region.
Referring to FIGS. 2A and 2B, voltages at horizontally and vertically adjacent pixel electrodes have alternating positive (+) and negative (−) polarities within each frame. Further, polarities of voltages applied to the same pixel electrodes are inverted between consecutive frames. When IPS mode LCD devices are driven according to the dot inversion driving method, a common voltage Vcom, having a fixed value, is applied to a common electrode of each pixel. Accordingly, in each frame, the data driver 150 alternately outputs data signals having positive (+) and negative (−) polarities while a value of the common voltage Vcom is maintained.
An operation of the related art IPS mode LCD device, driving according to the dot inversion driving method, will now be explained in greater detail with reference to FIGS. 2A-2B and 3.
FIG. 3 illustrates a timing chart of waveforms of a data voltage VD, a common voltage Vcom, and a gate voltage VG(n) applied to an IPS mode LCD device in a related art driving method.
Referring to FIG. 3, t1 and t2 represent first and second time periods, respectively, of first and second frames, during which the gate voltage VG(n) is output to an (n)th gate line.
As shown in FIGS. 2A-2B and 3, when the gate driver 140 supplies the gate voltage VG(n) to the (n)th gate line during a first time period t1 of the 1st frame, TFTs T connected to the (n)th gate line are turned on. At this time, the (n)th (m)th pixel receives a common voltage Vcom and the data driver 150 supplies a data voltage VD having a value of Vcom+V2 to the (m)th data line to supply the (n)th·(m)th pixel with the data voltage VD (Vcom+V2) via the TFT T. Therefore, the (n)th·(m)th pixel has a positive (+) voltage V2 (i.e., a voltage value equal to the difference between the data voltage VD having the positive polarity (+) and the common voltage Vcom) and reorients liquid crystal molecules within the (n)th·(m)th pixel accordingly.
After the first time period t1 of the 1st frame, the gate voltage VG(n) ceases to be output but the voltage V2 is maintained at the pixel electrode during the remainder of the first frame because voltages are charged within the liquid crystal and storage capacitors CLC and CST. As the first frame progresses, voltages charged in the liquid crystal capacitor CLC and the storage capacitor CST are slightly reduced due to a leakage current within the device.
During a second time period t2 of the 2nd frame (i.e., the frame immediately after the 1st frame), the gate voltage VG(n) is supplied to the (n)th gate line and TFTs T connected to the (n)th gate line are turned on. At this time, the (n)th ·(m)th pixel receives the common voltage Vcom as in the 1st frame. However, the data driver 150 supplies a second data voltage VD having a value of Vcom−V2 to the (m)th data line to supply the (n)th. (m)th pixel with the data voltage VD (Vcom−V2) via the TFT T. Therefore, and unlike the 1st frame, the (n)th·(m)th pixel has a negative (−) voltage V2 (i.e., a voltage value equal to the difference between the data voltage VD having the negative polarity (−) and the common voltage Vcom) and reorients liquid crystal molecules within the (n)th·(m)th pixel accordingly.
Thus, during the 1st and 2nd frames, the data driver 150 supplies the (n)th·(m)th pixel voltages V2 and V2 having positive (+) and negative (−) polarities and a voltage difference of ΔV. The voltage difference ΔV can be calculated by the following equation:ΔV=(Vcom+V2)−(Vcom−V2)=2V2 
FIG. 4 illustrates a gamma curve of the data driver when an IPS mode LCD device is driven with the common voltage Vcom in a related art driving method.
Referring to FIG. 4, if the related art IPS mode LCD device is driven using the 8-bit format, the data driver 150 outputs a gray level voltage VD having 256-gray levels. Accordingly, the output data voltage VD can have a positive polarity when a value of the output data voltage VD is greater than the common voltage Vcom or a negative polarity when a value of the output data voltage VD is less than the common voltage Vcom.
As described above, polarities of voltages applied to pixels driven according to the dot inversion driving method are inverted (i.e., (+) to (−) or (−) to (+)) in every column period. Therefore, if the value of the output data voltage VD is large when its polarity is inverted, the value of the voltage difference ΔV generated by the data driver 150 will also be large. For example, if the value of a voltage at a pixel is V0(i.e., the highest illustrated voltage value having a positive polarity) when its polarity inverted, the value of the voltage difference ΔV is equal to the difference between voltage values V0 and V17(i.e., the lowest illustrated voltage value having a negative polarity). As a result, the data driver 150 must drive the IPS mode LCD device using a high-voltage drive.
IPS mode LCD devices are driven at increased bit rates to display images having high resolution and color. Therefore, the driving voltages output by the data driver 150 increase as the bit rate increases and the data driver 150 must be able to generate data voltages VD having large magnitudes. However, data drivers which are capable of generating such data voltages VD must consume large amounts of power, incorporate complex circuitry and are, therefore, complex and expensive to fabricate, and expensive to operate.